mirror of
https://github.com/stargieg/bacnet-stack
synced 2025-10-26 23:35:52 +08:00
229 lines
6.8 KiB
C
229 lines
6.8 KiB
C
/*####COPYRIGHTBEGIN####
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-------------------------------------------
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Copyright (C) 2007 Steve Karg
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to:
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The Free Software Foundation, Inc.
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59 Temple Place - Suite 330
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Boston, MA 02111-1307, USA.
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As a special exception, if other files instantiate templates or
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use macros or inline functions from this file, or you compile
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this file and link it with other works to produce a work based
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on this file, this file does not by itself cause the resulting
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work to be covered by the GNU General Public License. However
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the source code for this file must still be made available in
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accordance with section (3) of the GNU General Public License.
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This exception does not invalidate any other reasons why a work
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based on this file might be covered by the GNU General Public
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License.
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-------------------------------------------
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####COPYRIGHTEND####*/
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#ifndef IAR2GCC_H
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#define IAR2GCC_H
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#if !defined(F_CPU)
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#define F_CPU (7372800)
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#endif
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/* IAR */
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#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
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#include <inavr.h>
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#include <ioavr.h>
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/* BitValue is used alot in GCC examples */
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#ifndef _BV
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#define _BV(bit_num) (1 << (bit_num))
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#endif
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/* inline function */
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static inline void _delay_us(
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uint8_t microseconds)
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{
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do {
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__delay_cycles(F_CPU / 1000000UL);
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} while (microseconds--);
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}
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#endif
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/* Input/Output Registers */
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#if defined(__GNUC__)
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#include <avr/io.h>
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typedef struct {
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unsigned char bit0:1;
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unsigned char bit1:1;
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unsigned char bit2:1;
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unsigned char bit3:1;
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unsigned char bit4:1;
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unsigned char bit5:1;
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unsigned char bit6:1;
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unsigned char bit7:1;
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} BitRegisterType;
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#ifndef true
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#define true 1
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#endif
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#ifndef false
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#define false 0
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#endif
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#define GPIO_BITREG(port,bitnum) \
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((volatile BitRegisterType*)_SFR_MEM_ADDR(port) \
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)->bit ## bitnum
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#define PINA_Bit0 GPIO_BITREG(PINA,0)
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#define PINA_Bit1 GPIO_BITREG(PINA,1)
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#define PINA_Bit2 GPIO_BITREG(PINA,2)
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#define PINA_Bit3 GPIO_BITREG(PINA,3)
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#define PINA_Bit4 GPIO_BITREG(PINA,4)
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#define PINA_Bit5 GPIO_BITREG(PINA,5)
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#define PINA_Bit6 GPIO_BITREG(PINA,6)
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#define PINA_Bit7 GPIO_BITREG(PINA,7)
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#define PORTA_Bit0 GPIO_BITREG(PORTA,0)
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#define PORTA_Bit1 GPIO_BITREG(PORTA,1)
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#define PORTA_Bit2 GPIO_BITREG(PORTA,2)
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#define PORTA_Bit3 GPIO_BITREG(PORTA,3)
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#define PORTA_Bit4 GPIO_BITREG(PORTA,4)
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#define PORTA_Bit5 GPIO_BITREG(PORTA,5)
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#define PORTA_Bit6 GPIO_BITREG(PORTA,6)
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#define PORTA_Bit7 GPIO_BITREG(PORTA,7)
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#define PINB_Bit0 GPIO_BITREG(PINB,0)
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#define PINB_Bit1 GPIO_BITREG(PINB,1)
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#define PINB_Bit2 GPIO_BITREG(PINB,2)
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#define PINB_Bit3 GPIO_BITREG(PINB,3)
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#define PINB_Bit4 GPIO_BITREG(PINB,4)
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#define PINB_Bit5 GPIO_BITREG(PINB,5)
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#define PINB_Bit6 GPIO_BITREG(PINB,6)
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#define PINB_Bit7 GPIO_BITREG(PINB,7)
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#define PORTB_Bit0 GPIO_BITREG(PORTB,0)
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#define PORTB_Bit1 GPIO_BITREG(PORTB,1)
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#define PORTB_Bit2 GPIO_BITREG(PORTB,2)
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#define PORTB_Bit3 GPIO_BITREG(PORTB,3)
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#define PORTB_Bit4 GPIO_BITREG(PORTB,4)
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#define PORTB_Bit5 GPIO_BITREG(PORTB,5)
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#define PORTB_Bit6 GPIO_BITREG(PORTB,6)
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#define PORTB_Bit7 GPIO_BITREG(PORTB,7)
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#define PINC_Bit0 GPIO_BITREG(PINC,0)
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#define PINC_Bit1 GPIO_BITREG(PINC,1)
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#define PINC_Bit2 GPIO_BITREG(PINC,2)
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#define PINC_Bit3 GPIO_BITREG(PINC,3)
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#define PINC_Bit4 GPIO_BITREG(PINC,4)
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#define PINC_Bit5 GPIO_BITREG(PINC,5)
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#define PINC_Bit6 GPIO_BITREG(PINC,6)
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#define PINC_Bit7 GPIO_BITREG(PINC,7)
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#define PORTC_Bit0 GPIO_BITREG(PORTC,0)
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#define PORTC_Bit1 GPIO_BITREG(PORTC,1)
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#define PORTC_Bit2 GPIO_BITREG(PORTC,2)
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#define PORTC_Bit3 GPIO_BITREG(PORTC,3)
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#define PORTC_Bit4 GPIO_BITREG(PORTC,4)
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#define PORTC_Bit5 GPIO_BITREG(PORTC,5)
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#define PORTC_Bit6 GPIO_BITREG(PORTC,6)
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#define PORTC_Bit7 GPIO_BITREG(PORTC,7)
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#define PIND_Bit0 GPIO_BITREG(PIND,0)
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#define PIND_Bit1 GPIO_BITREG(PIND,1)
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#define PIND_Bit2 GPIO_BITREG(PIND,2)
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#define PIND_Bit3 GPIO_BITREG(PIND,3)
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#define PIND_Bit4 GPIO_BITREG(PIND,4)
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#define PIND_Bit5 GPIO_BITREG(PIND,5)
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#define PIND_Bit6 GPIO_BITREG(PIND,6)
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#define PIND_Bit7 GPIO_BITREG(PIND,7)
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#define PORTD_Bit0 GPIO_BITREG(PORTD,0)
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#define PORTD_Bit1 GPIO_BITREG(PORTD,1)
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#define PORTD_Bit2 GPIO_BITREG(PORTD,2)
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#define PORTD_Bit3 GPIO_BITREG(PORTD,3)
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#define PORTD_Bit4 GPIO_BITREG(PORTD,4)
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#define PORTD_Bit5 GPIO_BITREG(PORTD,5)
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#define PORTD_Bit6 GPIO_BITREG(PORTD,6)
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#define PORTD_Bit7 GPIO_BITREG(PORTD,7)
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#define GPIOR0_Bit0 GPIO_BITREG(GPIOR0,0)
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#define GPIOR0_Bit1 GPIO_BITREG(GPIOR0,1)
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#define GPIOR0_Bit2 GPIO_BITREG(GPIOR0,2)
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#define GPIOR0_Bit3 GPIO_BITREG(GPIOR0,3)
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#define GPIOR0_Bit4 GPIO_BITREG(GPIOR0,4)
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#define GPIOR0_Bit5 GPIO_BITREG(GPIOR0,5)
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#define GPIOR0_Bit6 GPIO_BITREG(GPIOR0,6)
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#define GPIOR0_Bit7 GPIO_BITREG(GPIOR0,7)
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#define GPIOR1_Bit0 GPIO_BITREG(GPIOR1,0)
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#define GPIOR1_Bit1 GPIO_BITREG(GPIOR1,1)
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#define GPIOR1_Bit2 GPIO_BITREG(GPIOR1,2)
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#define GPIOR1_Bit3 GPIO_BITREG(GPIOR1,3)
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#define GPIOR1_Bit4 GPIO_BITREG(GPIOR1,4)
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#define GPIOR1_Bit5 GPIO_BITREG(GPIOR1,5)
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#define GPIOR1_Bit6 GPIO_BITREG(GPIOR1,6)
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#define GPIOR1_Bit7 GPIO_BITREG(GPIOR1,7)
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#define GPIOR2_Bit0 GPIO_BITREG(GPIOR2,0)
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#define GPIOR2_Bit1 GPIO_BITREG(GPIOR2,1)
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#define GPIOR2_Bit2 GPIO_BITREG(GPIOR2,2)
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#define GPIOR2_Bit3 GPIO_BITREG(GPIOR2,3)
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#define GPIOR2_Bit4 GPIO_BITREG(GPIOR2,4)
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#define GPIOR2_Bit5 GPIO_BITREG(GPIOR2,5)
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#define GPIOR2_Bit6 GPIO_BITREG(GPIOR2,6)
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#define GPIOR2_Bit7 GPIO_BITREG(GPIOR2,7)
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#endif
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/* Global Interrupts */
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#if defined(__GNUC__)
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#define __enable_interrupt() sei()
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#define __disable_interrupt() cli()
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#endif
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/* Interrupts */
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#if defined(__ICCAVR__)
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#define PRAGMA(x) _Pragma( #x )
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#define ISR(vec) PRAGMA( vector=vec ) __interrupt void handler_##vec(void)
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#endif
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#if defined(__GNUC__)
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#include <avr/interrupt.h>
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#endif
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/* Flash */
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#if defined(__ICCAVR__)
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#define FLASH_DECLARE(x) __flash x
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#endif
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#if defined(__GNUC__)
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#define FLASH_DECLARE(x) x __attribute__((__progmem__))
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#endif
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/* EEPROM */
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#if defined(__ICCAVR__)
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#define EEPROM_DECLARE(x) __eeprom x
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#endif
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#if defined(__GNUC__)
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#include <avr/eeprom.h>
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#define EEPROM_DECLARE(x) x __attribute__((section (".eeprom")))
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#endif
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/* IAR intrinsic routines */
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#if defined(__GNUC__)
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/* FIXME: intrinsic routines: map to assembler for size/speed */
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#define __multiply_unsigned(x,y) ((x)*(y))
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/* FIXME: __root means to not optimize or strip */
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#define __root
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#endif
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#endif
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