From 16241d010f69669e010e882def0d02be05888826 Mon Sep 17 00:00:00 2001 From: John Reiser Date: Sun, 14 Feb 2016 21:25:28 -0800 Subject: [PATCH] PUSH+POP now in macros.S --- src/stub/src/arch/arm/v8a/macros.S | 15 +++++++++++---- src/stub/src/arch/arm/v8a/nrv2b_d8.S | 5 ----- src/stub/src/arch/arm/v8a/nrv2d_d8.S | 4 ---- src/stub/src/arch/arm/v8a/nrv2e_d32.S | 3 --- src/stub/src/arch/arm/v8a/nrv2e_d8.S | 4 ---- 5 files changed, 11 insertions(+), 20 deletions(-) diff --git a/src/stub/src/arch/arm/v8a/macros.S b/src/stub/src/arch/arm/v8a/macros.S index af8f2919..f1b6dbc0 100644 --- a/src/stub/src/arch/arm/v8a/macros.S +++ b/src/stub/src/arch/arm/v8a/macros.S @@ -29,6 +29,17 @@ .altmacro +#define PUSH1(r1) str r1, [sp,#-1*8]! +#define PUSH2(r1,r2) stp r1,r2,[sp,#-2*8]! +#define PUSH3(r1,r2,r3) stp r1,r2,[sp,#-3*8]!; str r3, [sp,#2*8] +#define PUSH4(r1,r2,r3,r4) stp r1,r2,[sp,#-4*8]!; stp r3,r4,[sp,#2*8] +#define PUSH5(r1,r2,r3,r4,r5) PUSH2(r4,r5); PUSH3(r1,r2,r3) + +#define POP1(r1) ldr r1, [sp],#1*8 +#define POP2(r1,r2) ldp r1,r2,[sp],#2*8 +#define POP3(r1,r2,r3) ldr r3, [sp,#2*8]; ldp r1,r2,[sp],#3*8 +#define POP4(r1,r2,r3,r4) ldp r3,r4,[sp,#2*8]; ldp r1,r2,[sp],#4*8 + .macro section name .section \name .endm @@ -105,10 +116,6 @@ __NR_SYSCALL_BASE = 0x900000 .endm #endif /*}*/ -.macro ret - br lr /* armv5 for thumb interworking */ -.endm - .macro loadcon8 reg,val8 .long (0xe3<<24)|(0xa0<<16)|((\reg<<4)<<8)+(\val8) /* mov \reg,#\val8 */ .endm diff --git a/src/stub/src/arch/arm/v8a/nrv2b_d8.S b/src/stub/src/arch/arm/v8a/nrv2b_d8.S index 091a0c7f..df92db10 100644 --- a/src/stub/src/arch/arm/v8a/nrv2b_d8.S +++ b/src/stub/src/arch/arm/v8a/nrv2b_d8.S @@ -41,11 +41,6 @@ #define off w5 /* macros reduce "noise" when comparing this ARM code to corresponding THUMB code */ -#define PUSH1(r1) str r1, [sp,#-1*8]! -#define PUSH2(r1,r2) stp r1,r2,[sp,#-2*8]! -#define PUSH4(r1,r2,r3,r4) stp r1,r2,[sp,#-4*8]!; stp r3,r4,[sp,#2*8] -#define POP2(r1,r2) ldp r1,r2,[sp],#2*8 -#define POP3(r1,r2,r3) ldr r3,[sp,#2*8]; ldp r1,r2,[sp],#3*8 #define ADD2( dst,src) add dst,dst,src #define ADD2S(dst,src) adds dst,dst,src #define ADC2( dst,src) adc dst,dst,src diff --git a/src/stub/src/arch/arm/v8a/nrv2d_d8.S b/src/stub/src/arch/arm/v8a/nrv2d_d8.S index 13fa0de6..e23ce5e0 100644 --- a/src/stub/src/arch/arm/v8a/nrv2d_d8.S +++ b/src/stub/src/arch/arm/v8a/nrv2d_d8.S @@ -49,10 +49,6 @@ #define cnt w1 /* overlaps 'len' while reading an offset */ /* macros reduce "noise" when comparing this ARM code to corresponding THUMB code */ -#define PUSH2(r1,r2) stp r1,r2,[sp,#-2*8]! -#define POP2(r1,r2) ldp r1,r2,[sp],#2*8 -#define PUSH3(r1,r2,r3) stp r1,r2,[sp,#-3*8]!; str r3,[sp,#2*8] - #define ADD2( dst,src) add dst,dst,src #define ADD2S(dst,src) adds dst,dst,src #define ADC2( dst,src) adc dst,dst,src diff --git a/src/stub/src/arch/arm/v8a/nrv2e_d32.S b/src/stub/src/arch/arm/v8a/nrv2e_d32.S index 14842ca5..9bb9802f 100644 --- a/src/stub/src/arch/arm/v8a/nrv2e_d32.S +++ b/src/stub/src/arch/arm/v8a/nrv2e_d32.S @@ -49,9 +49,6 @@ #define cnt w1 /* overlaps 'len' while reading an offset */ /* macros reduce "noise" when comparing this ARM code to corresponding THUMB code */ -#define PUSH2(r1,r2) stp r1,r2,[sp,#-2*8]! -#define PUSH3(r1,r2,r3) stp r1,r2,[sp,#-3*8]!; str r3,[sp,#2*8] -#define POP2(r1,r2) ldp r1,r2,[sp],#2*8 #define ADD2( dst,src) add dst,dst,src #define ADD2S(dst,src) adds dst,dst,src #define ADC2( dst,src) adc dst,dst,src diff --git a/src/stub/src/arch/arm/v8a/nrv2e_d8.S b/src/stub/src/arch/arm/v8a/nrv2e_d8.S index f4b24c37..8a96dc7f 100644 --- a/src/stub/src/arch/arm/v8a/nrv2e_d8.S +++ b/src/stub/src/arch/arm/v8a/nrv2e_d8.S @@ -49,10 +49,6 @@ #define cnt w1 /* overlaps 'len' while reading an offset */ /* macros reduce "noise" when comparing this ARM code to corresponding THUMB code */ -#define PUSH2(r1,r2) stp r1,r2,[sp,#-2*8]! -#define PUSH3(r1,r2,r3) stp r1,r2,[sp,#-3*8]!; str r3,[sp,#2*8] -#define POP2(r1,r2) ldp r1,r2,[sp],#2*8 -#define POP1(r1) ldr r1, [sp],# 8 #define ADD2( dst,src) add dst,dst,src #define ADD2S(dst,src) adds dst,dst,src #define ADC2( dst,src) adc dst,dst,src