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https://github.com/upx/upx
synced 2025-09-28 19:06:07 +08:00
Fix ARM compress shared library.
This commit is contained in:
parent
0d3a2072b2
commit
9237e15adc
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@ -111,30 +111,35 @@ _=-1+_ // one less word on stack
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#define lodslu bl get4u
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#define lodslu bl get4u
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section ELFMAINX
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section ELFMAINX
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//D_INFO:
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// .long offset(.) // detect relocation
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// .long offset(.) // detect relocation
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// .long offset(user DT_INIT)
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// .long offset(user DT_INIT)
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// .long offset(escape_hatch)
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// .long offset(escape_hatch)
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// .long offset({p_info; b_info; compressed data})
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// .long offset({l_info; p_info; b_info; compressed data})
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#define DEBUG 0
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.code 16 //; .balign 4
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.code 16 //; .balign 4
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.real_start_ofELFMAINX:
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.real_start_ofELFMAINX:
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.thumb_func
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.thumb_func
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_start: .globl _start
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_start: .globl _start
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nop //; bkpt_th // for debugging
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nop
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#if DEBUG //{
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bkpt_th // for debugging
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#endif //}
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push {r0,r1,r2,r3,r4,r5,r6,r7,lr}
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push {r0,r1,r2,r3,r4,r5,r6,r7,lr}
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_=9
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_=9
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o_uinit= 1 // lr
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o_uinit= 1 // lr
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adr tmp,here; mov esi,#4*4 + here - _start
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adr esi,here
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sub esi,esi,#4*4 + 2*(4+ DEBUG) // D_INFO
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here:
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here:
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sub esi,tmp,esi
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mov ecx,esi
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mov ecx,esi
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ldr eax,[esi,#0*4]; sub ecx,eax; //str ecx,[SP(o_reloc)]
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ldr eax,[esi,#0*4]; sub ecx,eax; //str ecx,[SP(o_reloc)]
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// reloc DT_INIT for step 12
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// reloc DT_INIT for step 12
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ldr tmp,[esi,#1*4]; add tmp,ecx; str tmp,[SP(o_uinit)]
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ldr tmp,[esi,#1*4]; add tmp,ecx; str tmp,[SP(o_uinit)]
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ldr edi,[esi,#3*4]; add edi,ecx // &p_info; also destination for decompress
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ldr edi,[esi,#3*4]; add edi,ecx // &l_info; also destination for decompress
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// reloc &hatch (thumb mode) for step 10
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// reloc &hatch (thumb mode) for step 10
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ldr tmp,[esi,#2*4]; add tmp,ecx; add tmp,#1
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ldr tmp,[esi,#2*4]; add tmp,ecx
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mov esi,#sz_p_info
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mov esi,#sz_l_info+sz_p_info
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add esi,edi // &b_info
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add esi,edi // &b_info
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push_ tmp
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push_ tmp
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@ -325,6 +330,13 @@ _=-5+_ // 22
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blx eax // decompress
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blx eax // decompress
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pop_ tmp // toss arg5
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pop_ tmp // toss arg5
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// Place the escape hatch
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ldr edi,[SP(o_hatch)]
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ldr tmp,hatch // the 2 instructions
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str tmp,[edi]
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add edi,#1 // thumb mode
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str edi,[SP(o_hatch)]
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//p_unflt // 21
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//p_unflt // 21
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pop {arg1,arg2,arg3,arg4, eax, r5} // r5= w_fragment [discard]
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pop {arg1,arg2,arg3,arg4, eax, r5} // r5= w_fragment [discard]
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_=-6+_ // 15
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_=-6+_ // 15
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@ -352,9 +364,10 @@ _=-3+_ // 12
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.endif
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.endif
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pop {arg1,arg2, pc} // goto hatch
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pop {arg1,arg2, pc} // goto hatch
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_=-3+_ // 9
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_=-3+_ // 9
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//hatch:
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.balign 4
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// swi 0 // 0xdf00; munmap
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hatch:
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// pop {r0,r1,r2,r3,r4,r5,r6,r7,pc} // 0xbdff; goto user DT_INIT
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swi 0 // 0xdf00; munmap
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pop {r0,r1,r2,r3,r4,r5,r6,r7,pc} // 0xbdff; goto user DT_INIT
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.thumb_func
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.thumb_func
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movsl_subr:
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movsl_subr:
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File diff suppressed because it is too large
Load Diff
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@ -2,18 +2,18 @@ file format elf32-littlearm
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Sections:
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Sections:
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Idx Name Size VMA LMA File off Algn Flags
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Idx Name Size VMA LMA File off Algn Flags
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0 ELFMAINX 000000a0 00000000 00000000 00000034 2**2 CONTENTS, RELOC, READONLY
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0 ELFMAINX 0000009c 00000000 00000000 00000034 2**2 CONTENTS, RELOC, READONLY
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1 NRV_HEAD 00000000 00000000 00000000 000000d4 2**0 CONTENTS, READONLY
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1 NRV_HEAD 00000000 00000000 00000000 000000d0 2**0 CONTENTS, READONLY
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2 NRV_TAIL 00000000 00000000 00000000 000000d4 2**0 CONTENTS, READONLY
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2 NRV_TAIL 00000000 00000000 00000000 000000d0 2**0 CONTENTS, READONLY
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3 NRV2E 0000013c 00000000 00000000 000000d4 2**0 CONTENTS, RELOC, READONLY
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3 NRV2E 0000013c 00000000 00000000 000000d0 2**0 CONTENTS, RELOC, READONLY
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4 NRV2D 00000128 00000000 00000000 00000210 2**0 CONTENTS, RELOC, READONLY
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4 NRV2D 00000128 00000000 00000000 0000020c 2**0 CONTENTS, RELOC, READONLY
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5 NRV2B 000000ec 00000000 00000000 00000338 2**0 CONTENTS, RELOC, READONLY
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5 NRV2B 000000ec 00000000 00000000 00000334 2**0 CONTENTS, RELOC, READONLY
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6 LZMA_ELF00 000000b8 00000000 00000000 00000424 2**0 CONTENTS, RELOC, READONLY
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6 LZMA_ELF00 000000b8 00000000 00000000 00000420 2**0 CONTENTS, RELOC, READONLY
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7 LZMA_DEC20 00000938 00000000 00000000 000004dc 2**0 CONTENTS, RELOC, READONLY
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7 LZMA_DEC20 00000938 00000000 00000000 000004d8 2**0 CONTENTS, RELOC, READONLY
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8 LZMA_DEC10 00000478 00000000 00000000 00000e14 2**0 CONTENTS, RELOC, READONLY
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8 LZMA_DEC10 00000478 00000000 00000000 00000e10 2**0 CONTENTS, RELOC, READONLY
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9 LZMA_DEC30 00000000 00000000 00000000 0000128c 2**0 CONTENTS, READONLY
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9 LZMA_DEC30 00000000 00000000 00000000 00001288 2**0 CONTENTS, READONLY
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10 ELFMAINY 0000003e 00000000 00000000 0000128c 2**0 CONTENTS, READONLY
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10 ELFMAINY 0000003e 00000000 00000000 00001288 2**0 CONTENTS, READONLY
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11 ELFMAINZ 0000016c 00000000 00000000 000012cc 2**2 CONTENTS, RELOC, READONLY
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11 ELFMAINZ 00000178 00000000 00000000 000012c8 2**2 CONTENTS, RELOC, READONLY
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SYMBOL TABLE:
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SYMBOL TABLE:
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00000000 l ELFMAINX 00000000 .real_start_ofELFMAINX
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00000000 l ELFMAINX 00000000 .real_start_ofELFMAINX
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00000000 l d NRV2E 00000000 NRV2E
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00000000 l d NRV2E 00000000 NRV2E
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@ -38,11 +38,11 @@ SYMBOL TABLE:
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RELOCATION RECORDS FOR [ELFMAINX]:
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RELOCATION RECORDS FOR [ELFMAINX]:
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OFFSET TYPE VALUE
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OFFSET TYPE VALUE
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00000030 R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000002c R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000048 R_ARM_THM_CALL .real_start_ofELFMAINX
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00000044 R_ARM_THM_CALL .real_start_ofELFMAINX
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00000090 R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000008c R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000096 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000092 R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000009c R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000098 R_ARM_THM_CALL .real_start_ofELFMAINZ
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RELOCATION RECORDS FOR [NRV2E]:
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RELOCATION RECORDS FOR [NRV2E]:
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OFFSET TYPE VALUE
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OFFSET TYPE VALUE
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@ -255,12 +255,12 @@ OFFSET TYPE VALUE
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00000028 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000028 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000030 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000030 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000050 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000050 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000068 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000072 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000082 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000090 R_ARM_THM_CALL .real_start_ofELFMAINZ
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000000b4 R_ARM_PC24 ELFMAINZ
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000000c0 R_ARM_PC24 ELFMAINZ
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000000d2 R_ARM_THM_CALL .real_start_ofELFMAINZ
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000000de R_ARM_THM_CALL .real_start_ofELFMAINZ
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000000f8 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000104 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000110 R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000011c R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000011a R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000126 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000124 R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000130 R_ARM_THM_CALL .real_start_ofELFMAINZ
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0000012c R_ARM_THM_CALL .real_start_ofELFMAINZ
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00000138 R_ARM_THM_CALL .real_start_ofELFMAINZ
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